IP Verification Engineer

Senior Verification Engineers – Fully remote – Long term – UVM & SystemVerilog

We’re supporting our market leading Semiconductor client in their search for Multiple Senior Verification Engineers to support the cutting edge development of their next generation AI Chip.

The role of the Verification Engineers will be to set up Testbench environments from scratch, own Verification lifecycles for certain blocks/IP’s from end to end and to perform tests using certain test suites. Our clients are interested in Verification Engineers with strong UVM & SystemVerilog experience and that have experience with at least one of the below areas:

• Synopsys Sting / Brekker / Test suites from EDA vendors
• C tests
• Cache Coherency protocols (ideally AMBA CHI)
• AXI Protocols
• Developing Verification environments from scratch
• Emulation set up

These are fully remote, long-term opportunities to work on a very cutting-edge project in the AI domain where you will have the opportunity to work with new, modern, cutting-edge technologies and protocols.

These are urgent positions with interviews on-going with the client, so please apply immediately if these sound like the next roles for you!